时间:2022-06-06 20:21:07
分频器。
frequency: n. 1.屡次,频仍,频繁。 2.(脉搏等的)次数,出现 ...
divider: n. 1.划分者;分割者;分裂者,离间者。 2.间隔物; ...
N is the desired noninteger frequency divider .
N为所要求的非整数分频值。
It was used as a frequency divider and no numbers are decoded from it .
它被用作无解码输出的分频器。
N is the desired noninteger frequency divider
N为所要求的非整数分频值。
Variable division frequency divider
可变分频器
Design of hardware consists of three pll loops , micro wave sample mixer , fractional - n frequency divider
硬件电路包括三个锁相环,取样混频器,分数分频器的设计等。
The pll consists of a crystal oscillator , a ring voltage - control - oscillator , a frequency divider , a phase / frequency detector , a charge pump and a loop filter
设计的电路包括20mhz晶体振荡器,鉴频鉴相器,压控振荡器,固定分频器,电荷泵和低通滤波器。
This paper introduces the principle of the frequency division and presents the circuit design of the decimal frequency divider based on fpga . the vhdl language is used for the programming
摘要介绍了一种基于fpga的小数分频器的分频原理及电路设计,并用vhdl进行编程实现,并对这种小数分频器的抖动进行分析和计算。
In the sub block circuit design , the contents that the author had introduced include : the principle of band gap voltage reference and the design technique in low power supply ; the analysis of spike pulse noise rejection , frequency divider and dead time in oscillator and control circuit ; the selection of the width and length ratio of four switches and 2x / 1x mode change point in driver and mode selection circuits
在子电路设计中,作者比较深入分析的内容有:基准电路的原理及低电源电压下基准电路的设计;振荡器和控制电路中尖峰脉冲噪声抑制、两分频电路及死区时间设定;驱动及模式选择电路中开关管的宽长比的选择及模式转换点的设计。
One is based on vco , and the other is based on frequency divider . the advantages and disadvantages of them are discussed in the thesis . furthermore , a method of realizing dead time changeable circuit is given , which makes the designed driving circuit have more latitude when it is used
此外,论文还设计了两种驱动信号产生电路,一种基于vco ,另一种基于振荡器和分频器,并对比了两者的优缺点;给出了一种死区时间可变的电路实现方案,使所设计的驱动电路使用时具有更大的灵活性。